ASIC & FPGA Design Engineer at Craig Technologies in Huntsville, AL
An ideal ASIC and FPGA Design Engineer can expect to do the following:
Participate in all phases of ASIC/FPGA design flow - from concept to mass production o Develop high-level design requirements and block-level micro-architectures, partition design within ASIC/FPGA, create specification documents o Develop RTL designs using SystemVerilog, with emphasis on DSP and digital communication system blocks (frontend, physical layer, link layer, error correction, etc.) o Optimize designs for area, speed, and power to meet system requirements; analyze architectural trade-offs o Develop test benches and test cases for block-level functional verification, emphasizing bit-matching and self-checking o Verify DSP blocks against fixed-point MATLAB model, work in collaboration with systems engineers o Participate in SoC-level and FPGA top-level integration activities o Prototype designs on FPGA, focusing on closely emulating the final product functionality o Perform lint checking, CDC checking, logic equivalence checking, and other EDA tool-based checks o Work with backend/implementation teams to address synthesis, timing, layout, and DFT issues for ASICs o Bring-up and validate ASICs and FPGAs in the lab, utilize various lab equipment oCollaborate with software engineers in developing production software for your designs Minimum Required
Qualifications:
9-15 years of experience. o Experience or coursework in the design of FPGA and/or ASIC devices. o Experience or coursework in the verification of FPGA and/or ASIC devices. o Experience or coursework with modern verification methodologies such as UVM, OVM or VMM. o Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test). o Knowledge of space-grade/qualified FPGAs and ASICs. o Knowledge of digital design, development, and simulation.
Salary Range:
$150K -- $200K
Minimum Qualification
Hardware DevelopmentEstimated Salary: $20 to $28 per hour based on qualifications.
Participate in all phases of ASIC/FPGA design flow - from concept to mass production o Develop high-level design requirements and block-level micro-architectures, partition design within ASIC/FPGA, create specification documents o Develop RTL designs using SystemVerilog, with emphasis on DSP and digital communication system blocks (frontend, physical layer, link layer, error correction, etc.) o Optimize designs for area, speed, and power to meet system requirements; analyze architectural trade-offs o Develop test benches and test cases for block-level functional verification, emphasizing bit-matching and self-checking o Verify DSP blocks against fixed-point MATLAB model, work in collaboration with systems engineers o Participate in SoC-level and FPGA top-level integration activities o Prototype designs on FPGA, focusing on closely emulating the final product functionality o Perform lint checking, CDC checking, logic equivalence checking, and other EDA tool-based checks o Work with backend/implementation teams to address synthesis, timing, layout, and DFT issues for ASICs o Bring-up and validate ASICs and FPGAs in the lab, utilize various lab equipment oCollaborate with software engineers in developing production software for your designs Minimum Required
Qualifications:
9-15 years of experience. o Experience or coursework in the design of FPGA and/or ASIC devices. o Experience or coursework in the verification of FPGA and/or ASIC devices. o Experience or coursework with modern verification methodologies such as UVM, OVM or VMM. o Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test). o Knowledge of space-grade/qualified FPGAs and ASICs. o Knowledge of digital design, development, and simulation.
Salary Range:
$150K -- $200K
Minimum Qualification
Hardware DevelopmentEstimated Salary: $20 to $28 per hour based on qualifications.
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